The present invention relates generally to a method of fabricating high density sub-lithographic features on a substrate. More specifically, the present invention relates to a method of fabricating high density sub-lithographic features on a substrate using common microelectronic processing techniques to form a plurality of sub-lithographic spacers on a substrate, wherein within a minimum resolution of a lithographic system, a density of features can be increased by a factor of two or more.
A standard method in the microelectronics industry for patterning features on a substrate uses well understood photolithographic processes. Typically, a layer of photoresist is coated onto a substrate material followed by exposing the photoresist with a light source through a mask. The mask includes patterned features, such as lines and spaces, that are to be transferred to the photoresist. After the photoresist is exposed, the photoresist is immersed in a solvent to define the patterns that were transferred to the photoresist. The patterns produced by this process are typically limited to line widths greater than a minimum resolution xcex of a photolithographic alignment tool, which is ultimately limited by a wavelength of light of a light source used to expose the photoresist. At present, a state of the art photolithographic alignment tool is capable of printing line widths as small as about 100.0 nm.
Features patterned into the photoresist are transferred into the substrate material using well known microelectronics processes such as reactive ion etching, ion milling, plasma etching, or chemical etching, for example. Using standard semiconductor processing methods, lines of width xcex or gratings (i.e. a line-space sequence) of a period 2xcex can be created.
However, in many applications it is advantageous to have the line width or the period be as small as possible. Smaller line widths or periods translate into higher performance and/or higher density circuits. Hence, the microelectronics industry is on a continual quest to reduce the minimum resolution in photolithography systems and thereby reduce the line widths or periods on patterned substrates. The increases in performance and/or density can be of considerable economic advantage because the electronics industry is driven by a demand for faster and smaller electronic devices.
In FIG. 1a, a prior method of fabricating lines narrower than a minimum feature size xcex comprises controlling the etch process used to pattern a substrate material. A substrate 101 includes lines 103 having a minimum feature size xcex that is greater than or equal to a minimum resolution xcex of a lithographic system used to pattern the lines 103. Because of the minimum resolution xcex of the lithographic system, the lines 103 will be spaced apart by a space 105 that is also greater than or equal to xcex. In FIG. 1a, the line 103 and space 105 pattern has a period of 2xcex. Accordingly, within the period of 2xcex a density of features is two, that is, there is one line feature 103 and one space feature 105. Similarly, within the distance of xcex, the density of features is one, that is, there is either a line 103 or a space 105 within the distance of xcex.
In FIG. 1b, the lines 103 have their respective widths reduced to a width that is less than xcex by controlled lateral plasma etching such that a vertical sidewall s of the lines 103 prior to etching (see arrow e) recedes in a lateral direction to a reduced width (see dashed arrow r) that is less than xcex (i.e.  less than xcex). However, the density of lines 103 has not been increased by the above method. In fact, due to the lateral etching, the lines 103 are made narrower than xcex (i.e.  less than xcex) and the spaces 105 are made wider than xcex (i.e.  greater than xcex) due to the recession of the vertical sidewalls S. As a result, the density of features (103, 105) within the period of 2xcex remains two and the density of features within the distance of xcex remains one.
Similarly, in FIG. 2a, if the features in a substrate 107 include a grating 109 having a line 111 and a space 113 that have a feature size that is greater than or equal to xcex. Within a period of 2xcex, the number of features (111, 113) is two and the density of features within the distance of xcex remains one.
In FIG. 2b, after controlled lateral plasma etching, vertical sidewalls S have receded with the end result being the spaces 113 are wider than xcex (i.e.  greater than xcex) and the lines 111 are narrower than xcex (i.e.  less than xcex). As before, the density of features (111, 113) within the period of 2xcex remains two and the density of features within the distance of xcex remains one.
Therefore, there is a need for a method of fabricating sub-lithographic sized features that have a width that is narrower than a minimum resolution of a lithographic system. There also exists a need for a method of fabricating sub-lithographic sized features that increases a density of features within a minimum resolution of a lithographic system.
The method of fabricating high density sub-lithographic features of the present invention solves the aforementioned problems by using common microelectronic processes including sub-lithographic spacer formation and Damascene processes to form a plurality of sub-lithographic spacers on a substrate. The sub-lithographic spacers have a period that is less than a minimum resolution of a lithographic system. Spacers, in microelectronics processing parlance, are films that cover vertical side walls of features on a substrate. Damascene processing refers to a technique for creating inlaid patterns of a first material in a matrix of a second material by deposition of the first material into a depression defined in the second material, followed by removal of a portion of the first material by a planarization process. For example, a planarization process such as chemical mechanical planarization (CMP) can be used to remove and planarize the first material.
A density of features, including the sub-lithographic spacers, within a minimum resolution of the lithographic system is increased by the method of the present invention. Moreover, the density of features within the minimum resolution of the lithographic system can be further increased by subsequent depositions of material, followed by anisotropic etching to selectively remove horizontal surfaces of the deposited material. The depositions of the material can be conformal depositions wherein a horizontal thickness and a vertical thickness of the deposited material are substantially equal to each other.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the present invention.